TGV still faces technical barriers; CoPoS commercialization not likely until 2030
retained text
DIGITIMES has found that the advanced packaging market continues to expand as demand for AI chips rises and package sizes increase. OSATs and panel makers have been developing FOPLP technology in advance, while wafer fabs are pursuing CoPoS technology. Both aim to replace ABF substrates with glass substrates, or silicon interposers with glass interposers. At present, some OSATs and panel makers have already mass-produced FOPLP, but glass interposers have yet to enter mass production, mainly because through-glass via technology is still immature. Ibiden, a leading substrate supplier in Japan, expects the technology barriers to through-glass vias to be broken only by 2030, meaning advanced CoPoS using glass interposers is also unlikely to be commercialized before then. As AI chip package areas increase in line with computing power requirements, the number of chips that can be packaged on a 12-inch wafer is falling, raising area waste. Warpage caused by the large mismatch in thermal expansion coefficients between traditional organic substrate materials such as ABF and silicon wafers is also becoming more severe. In addition, interposers, which serve as a bridge between different chips and packaging platforms, require ever larger areas, making it necessary to replace silicon wafers with lower-cost materials. Because of its compatible thermal expansion coefficient, high flatness, low signal loss, and low cost, glass substrate is regarded as the most suitable substitute. As a result, related companies are developing advanced packaging technologies based on glass substrates to meet market demand. This report covers the roadmap of TSMC's CoPoS technology development, as well as the progress of other global foundries, including Intel, Samsung, Rapidus, and PSMC. - Relationship between foundry CoPoS and OSAT, panel makers' FOPLP - Technical differences between foundries and OSAT/panel makers - Taiwan panel makers' advanced packaging plans for semiconductors - Chart 2: Operating strategies for Taiwan panel makers' old fabs as they move into advanced packaging - OSATs/panel makers and TSMC will be both customers and competitors - Chart 3: Innolux expands its advanced packaging plan to cooperation with TSMC - TSMC's CoPoS mass-production timing in Taiwan hinges on pace of technical breakthroughs - Chart 5: TSMC's advanced packaging capacity expansion plan in Taiwan - TSMC's Arizona site aligned with US customer demand; will focus on CoPoS over long term - CoPoS bottleneck resolution slower than expected; will extend lifecycle of CoWoS products - Current status and outlook of other foundries' CoPoS-like technologies - Chart 8: Intel's roadmap for sub-2nm advanced process and advanced packaging expansion - Samsung affiliates team up to advance glass-substrate packaging; will start with smaller sizes - Chart 9: Samsung Group's glass-substrate advanced packaging plan - Chart 10: Rapidus's advanced process and advanced packaging development status and outlook - Powerchip's 3D AI Foundry plan could also extend to glass substrates
document fetched 2026-07-24 08:12 · canonical https://digitimes.com/news/a20260721RS400/copos-glass-substrate-packaging-through-silicon-via-tsmc-2030.html?chid=2