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Micron has demonstrated a 512GB DDR5 RDIMM running on multiple server platforms, which it calls the world’s first module at that capacity, and says AMD and Intel are both validating it for their next-generation server platforms. The module is rated for speeds up to 9,200 MT/s, and in a 24-slot dual-socket server it puts 12TB of DDR5 behind two CPUs. Volume production is scheduled for the second half of 2027. How Micron Gets to 512GB on One Module Micron vertically stacks DRAM dies inside each package and connects them with through-silicon vias (TSVs), the same die-stacking approach HBM uses. Stacking more dies per package doubles the capacity per slot without changing the module’s footprint or the server’s DIMM count, which is how a dual-socket, 24-slot system reaches 12TB. “Micron continues to set the pace for memory technology, delivering a new class of ultra-dense, high-performance server memory that helps customers keep larger datasets closer to the compute engines that need them,” said Raj Narasimhan, senior vice president and general manager of the Cloud Memory Business Unit at Micron. “A 512GB RDIMM enables multi-terabyte servers, supporting larger AI and database workloads, greater virtualization density and improved power efficiency, all within existing server footprints.” The 9,200 MT/s rating is the other notable figure, well past the DDR5-6400 ceiling for standard RDIMMs on current Xeon 6 platforms, and Micron’s release ties the module to next-generation platforms from both CPU vendors, so the speed and the capacity appear to arrive together with the 2027 server cycle. Micron RDIMMs have populated many of the Xeon 6 and EPYC systems through our lab, and its MRDIMMs were behind the HPE XD230’s STAC-A2 record earlier this year. One 512GB Module Against Four 128GB Modules Micron’s efficiency claim is that a single 512GB RDIMM cuts operating power by more than 60% compared with four 128GB RDIMMs of the same total capacity. 16W for the 512GB module against 44.2W for the four 128GB modules combined, a 63.8% reduction, or roughly 31mW per gigabyte against 86mW. The comparison assumes a server that has four free slots to spend on the alternative; the more common case is a server that has run out of slots, where the 512GB module is the only way to add capacity at all. The density argument is significant in many use cases, and it’s a similar one we made around their 245TB SSD recently. On performance, Micron cites up to 1.4x higher throughput for memory-bound workloads such as Spark SVM-based data analytics compared with 256GB DDR5 configurations, and says the module improves throughput and concurrency for memory-intensive databases and caching platforms including RocksDB and Redis. AMD, Intel, and an Early Customer Voice Both CPU vendors supplied validation statements. “Our close engineering collaboration with Micron brings compute and memory innovation together to help customers realize the full value of AMD-powered platforms,” said Amit Goel, corporate vice president, Compute and Enterprise AI Platform Solutions Engineering at AMD. Karin Eibschitz Segal, general manager of platform and system engineering in Intel’s Data Center Group, said Intel “is working closely with Micron to validate its 512GB DDR5 RDIMM and help enable future server platforms designed to meet the growing demands of next-generation data center workloads.” The release also carries a customer-side quote from Darrin Alves, chief information officer for Infrastructure Platforms at JPMorganChase, who said higher-capacity memory “will help enterprises support larger in-memory workloads, improve resource utilization and enhance the flexibility needed to scale modern computing environments.” In-memory databases, large-scale virtualization, and CPU-side inference for LLMs and agentic workloads are the use cases Micron names, all of which are gated by how much data a server can hold in main memory before spilling to storage. Timing The second-half 2027 production target puts the 512GB RDIMM a year or more out. In August, Micron and SK hynix committed billions to new DRAM fabs, with little of that capacity landing before 2028, so the module arrives in the same window as the wafer output it will draw on.
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