Breaking AI's memory wall: former TSMC VP charts a path with HBM, optical links and 3D stacking

retained text

H.-S. Philip Wong, the Willard R. and Inez Kerr Bell Professor in the School of Engineering at Stanford University. Credit: DIGITIMES
AI processor performance continues to improve, but memory bandwidth is growing more slowly, making data supply a major constraint on AI chip performance and energy efficiency...
Keep me signed in
Some subscribers prefer to save their log-in information so they do not have to enter their User ID and Password each time they visit the site. To activate this function, check the 'Keep me signed in' box in the log-in section. This will save the password on the computer you're using to access the site.

document fetched 2026-10-21 02:55 · canonical https://digitimes.com/news/a20261021PD215/hbm-3d-bandwidth-data-performance.html