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Off the Wire Press Releases SAN JOSE, Calif., Sept. 15, 2026 — Astera Labs, Inc., a leader in semiconductor-based connectivity solutions for rack-scale AI infrastructure, today announced three new memory connectivity solutions—Leo X-Series and the Leo 2 E & P-Series—extending its hyperscale-proven Leo Smart Memory Controller family across direct fabric-attached GPU memory and CPU-attached expansion and pooled/shared memory architectures. “Agentic AI adoption is outpacing the industry’s ability to provision memory for it, and that gap is widening every quarter,” said Matt Kimball, vice president and principal analyst at Moor Insights & Strategy. “That growth is landing at the worst possible time for memory supply, with DDR5 tight and pricing climbing, so every gigabyte already deployed has to work harder. The new Leo X-Series and Leo 2 E and P-Series Smart Memory Controllers immediately address KV-cache-intensive AI workloads, improve memory utilization, and reliably reuse previously deployed memory across both AI and general-purpose cloud infrastructure, instead of simply buying more of it.” New Leo X-Series: Direct Fabric-Attached Memory for Agentic AI The new Leo X-Series is a fabric-attached Smart Memory Controller purpose-built to directly support AI accelerator-side memory demand. Paired with Astera Labs’ Scorpio fabric switches, using PCIe and platform-specific protocols for scaling up GPUs, Leo X-Series enables direct connectivity to AI fabrics and a dedicated memory tier for offloading KV cache and agent context. As context windows grow and multi-turn sessions retain more prior tokens, larger KV-cache capacity with low-latency and high bandwidth access becomes critical for the highest-value agentic AI inference workloads, helping minimize response times and deliver a more responsive user experience. By connecting memory directly to the scale-up fabric, Leo X-Series provides a lower-latency and higher bandwidth path for GPU-to-KV-cache access versus architectures that rely solely on CPU-attached memory or NVMe storage tiers. Leo X-Series’ support for PCIe in addition to platform-specific custom interfaces allows hyperscalers and AI platform providers to build a customized memory companion architecture suited to their compute platform rather than a one-size-fits-all design. These capabilities are designed to improve KV-cache performance and token economics, delivering up to 62% lower TTFT and up to 22% more TPS. Enhanced Leo 2 E-Series and Leo 2 P-Series for Memory Expansion and Pooling/Sharing The enhanced Leo 2 E & P-Series provide complementary approaches to CPU-attached capacity and rack-scale memory utilization that can support AI agents, in-memory databases, and general-purpose cloud workloads. These devices support four DDR4 or DDR5 memory controllers that double memory bandwidth and capacity versus the previous generation, while an optimized chip package fits add-in cards and other designs to optimize DIMM integration density. - Leo 2 E-Series provides direct CPU-attached CXL 3.2 memory expansion via PCIe 6 x16 host connectivity. It delivers additional memory capacity without requiring another CPU socket and enables infrastructure providers to redeploy previously deployed memory in new, state-of-the-art cloud servers supporting high-volume workloads. - Leo 2 P-Series enables disaggregated CXL memory architectures with pooling and sharing across hosts, supported by dual-port PCIe 6 x8 connectivity and dynamic capacity management. Hosts can draw pooled memory on demand instead of over-provisioning every server, turning stranded DRAM into a rack-level resource increasing utilization which is critical in a memory supply constrained environment. A Common Foundation for Reliable, Interoperable Memory Deployment and Re-Use Across the Leo family, hyperscale-grade RAS and memory-health management support reliable operation for evolving compute and memory platforms. Purpose-built memory test engines and automated repair engines help extend maximum lifetime for existing memory DIMMs, assist with pre-deployment testing, and identify reliable DIMMs for reuse. Enhanced memory error reporting, event recording, scrubbing, customizable thermal management, and resilient firmware updates help protect workloads and extend memory service life. Workload monitoring, performance profiling, hotness tracking, software-defined data placement, and latency optimization help fine-tune memory placement and access latency for long-context agentic AI and general purpose workloads. Telemetry and management integration, together with Astera Labs’ COSMOS software suite, provides fleet-wide visibility as operators combine previously deployed DDR4, newly deployed DDR5 in modern cloud server fleets, pooled, and accelerator-attached capacity across the rack. “Agentic AI is where the economics of AI infrastructure are being decided, and those economics depend on putting every usable gigabyte of memory to work,” said Thad Omura, senior vice president, Compute Connectivity Group at Astera Labs. “The enhanced Leo family gives infrastructure providers purpose-built ways to connect memory to accelerators, CPUs, and hosts across the rack—turning previously deployed and stranded capacity into a resource that new AI and cloud workloads can use. We’re seeing that translate into broader customer engagement across AI labs, hyperscalers, and neoclouds.” The enhanced Leo family was developed by Astera Labs in close collaboration with CPU and GPU ecosystem partners, including AMD, Arm, Intel, and major memory suppliers, alongside additional hyperscale and OEM collaborators. The family is sampling today with hyperscaler customers. Astera Labs will demonstrate Leo family capabilities—including direct fabric-attached memory for Agentic AI, DDR4 reuse, dynamic memory pooling, and Agentic AI memory tiering with Scorpio X-Series—at AI Infra Summit 2026 at the Santa Clara Convention Center, September 15–17. About Astera Labs Astera Labs (Nasdaq: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink Fusion, PCIe, and UALink semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com. Source: Astera Labs
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