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The Centre has notified the ₹1.28 Lakh Cr Semicon 2.0 scheme to accelerate the development of India’s semiconductor design and manufacturing ecosystem and strengthen domestic capabilities across the chip value chain. The notification comes more than a month after the Union Cabinet approved the second phase of the India Semiconductor Mission with an exact outlay of ₹1,27,500 Cr. Semicon 2.0 was first announced by finance minister Nirmala Sitharaman in the Union Budget for FY27. “Semicon 2.0 provides fiscal support to various verticals across the complete value chain of the semiconductor industry, ranging from chip design, fabrication and packaging to various segments of the semiconductor ecosystem,” the notification said. The scheme has been divided into six pillars covering semiconductor design, machines and materials, fabs, assembly and packaging, R&D, and talent development. These pillars encompass 10 categories of support. The scheme aims to build a strong, trusted and self-reliant semiconductor ecosystem in India by supporting the development and use of technologies for critical and strategic infrastructure. Under the design component, the government will support the development of semiconductor IP cores, chips, system-on-chips (SoCs) and modules for electronic products based on national priorities and strategic needs. The government also plans to develop standard IP building blocks for areas such as computing, memory, radio frequency (RF), power, networking and sensors, the notification said. Support Across Semiconductor Value Chain Semicon 2.0 extends government support beyond chip fabrication to the infrastructure and capabilities needed to build a domestic semiconductor ecosystem. The scheme provides support for semiconductor equipment and materials, wafer fabrication, assembly, testing, marking and packaging (ATMP), outsourced semiconductor assembly and test (OSAT), as well as semiconductor research and development and talent development. For semiconductor design, eligible startups and MSMEs can receive seed funding of up to ₹15 Cr. The scheme also provides equity co-investment support for eligible companies that have raised funding from VC or PE investors. The government will also provide deployment-linked incentives for eligible semiconductor IPs, chips and SoCs launched for the first time after the scheme’s announcement. Semicon 2.0 also provides fiscal support for setting up semiconductor fabs and advanced packaging facilities, alongside manufacturing infrastructure for semiconductor equipment and materials. Silicon wafer fabs with a minimum capital investment of ₹20,000 Cr will be eligible for government support equivalent to 40% of eligible capital expenditure. Compound semiconductor, photonics, sensor and discrete semiconductor fabs will also receive fiscal support under the scheme. Advanced semiconductor packaging projects, including 2.5D and 3D packaging, wafer-level chip-scale packaging and heterogeneous integration, will also qualify for government support. The scheme further provides support for R&D facilities focused on semiconductor equipment, semiconductor-grade raw materials, and testing and characterisation infrastructure. Semicon 2.0 To Build Domestic Chip Capabilities The government is also looking to strengthen India’s semiconductor R&D, design capabilities and talent pool under Semicon 2.0. The scheme will support research in advanced technologies such as CMOS fabrication, silicon photonics, display fabrication and chiplets, while also providing access to advanced design tools, fabrication services and training infrastructure. Speaking at a press conference after the scheme was notified, IT minister Ashwini Vaishnaw said India aims to develop 1 Lakh additional semiconductor engineers under the programme, citing an expected global shortage of about 1 Mn workers by 2032. “Now, we have set up a target of developing 1 Lakh more engineers,” Vaishnaw said. India has already trained 85,000 semiconductor engineers, achieving its 10-year target in four years. “People should feel dependent on India. People should become dependent on our country, on our industry, on our production, on our design,” Vaishnaw said. Semiconductor design programmes have also been expanded to 355 universities, including those in Tier II and III cities. Students have so far designed 255 chips, the minister said. The programme has identified six key semiconductor categories — compute, memory, radio frequency (RF), power, networking and sensors — with around 100 chips prioritised for development. These chips are expected to cater to sectors such as aviation, transportation, consumer electronics and strategic industries. The notification builds on the first phase of the India Semiconductor Mission, under which the Centre approved 12 manufacturing projects across six states. The push comes as major economies ramp up support for their semiconductor industries. According to data presented by the government, the US has announced a support of $52.7 Bn under the CHIPS and Science Act, while the European Union has earmarked $49 Bn under the EU CHIPS Act 1.0 and is discussing a further $140 Bn proposal under CHIPS Act 2.0. Japan has announced a $25.7 Bn Semiconductor Strategy, South Korea has committed $23.3 Bn under its Semiconductor Ecosystem Support Package, and Singapore has announced $27.5 Bn under its RIE2030 Strategy. China has committed $47.5 Bn in the third round of its “Big Fund”, taking its cumulative semiconductor fund support to more than $150 Bn since 2014. Taiwan has announced $9.3 Bn under its Chip-based Industrial Innovation Program.
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