IBM announced a major chip breakthrough with a sub-1nm 'nanostack' 3D transistor architecture, experimentally validated...

IBM announced a major chip breakthrough with a sub-1nm 'nanostack' 3D transistor architecture, experimentally validated using ASML's High NA EUV lithography tool at its Albany research facility source 2. The nanostack packs nearly 100 billion transistors, doubling density of IBM's 2nm node, and promises up to 50% higher performance or 70% greater energy efficiency source 3. This milestone demonstrates that advanced EUV systems are critical for next-generation logic scaling, reinforcing long-term demand for ASML's High NA EUV platforms. As foundries like TSMC, Samsung, and Intel race to sub-1nm nodes, ASML's monopoly on EUV lithography positions it to benefit from the industry's scaling roadmap. The news also suggests potential future orders from IBM's partners for production tools, though commercial adoption is still 5 years out.